View ISL43240_311292.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
ISL43240
Data Sheet April 2003 FN6036.1
Low-Voltage, Single and Dual Supply, Quad SPDT, High Performance Analog Switches
The Intersil ISL43240 device is a CMOS, precision, quad SPDT analog switches designed to operate from a single +2V to +12V supply or from a 2V to 6V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (5W), low leakage currents (5nA max), and fast switching speeds (tON = 52ns, tOFF = 40ns). A 5 maximum RON flatness ensures signal fidelity, while channel-to-channel mismatch is guaranteed to be less than 2. The ISL43240 is a quad single-pole / double-throw (SPDT) device and can be used as a quad SPDT, a quad 2:1 multiplexer, a single 4:1 multiplexer, or a dual 2-channel differential multiplexer. Table 1 summarizes the performance of this family.
TABLE 1. FEATURES AT A GLANCE CONFIGURATION 4.5V RON 4.5V tON/tOFF 10.8V RON 10.8V tON/tOFF 4.5V RON 4.5V tON/tOFF 3V RON 3V tON/tOFF Packages QUAD SPDT 18 52ns/40ns 14 40ns/27ns 30 64ns/29ns 51 120ns/50ns 20 Ld SSOP, 20 Ld QFN 4x4
Features
* Fully Specified for 10% Tolerances at VS = 5V and V+ = 12V, 5V and 3.3V * Four Separately Controlled SPDT Switches * ON Resistance (RON) . . . . . . . . . . . . . . . . . . . . . . . . 18 * RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1 * Low Charge Injection . . . . . . . . . . . . . . . . . . . . . . 5pC (Max) * Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<5W * Low Off Leakage Current (Max at 85oC) . . . . . . . . . 2.5nA * Fast Switching Action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns * Guaranteed Break-Before-Make * Minimum 2000V ESD Protection per Method 3015.7 * TTL, CMOS Compatible
Applications
* Battery Powered, Handheld, and Portable Equipment - Barcode Scanners - Laptops, Notebooks, Palmtops * Communications Systems - Radios - XDSL and PBX / PABX - RF "Tee" Switches - Base Stations * Test Equipment - Medical Ultrasound - Electrocardiograph - ATE * Audio and Video Switching * General Purpose Circuits - +3V/+5V DACs and ADCs - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * AN557 "Recommended Test Procedures for Analog Switches"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL43240 Pinouts
(Note 1) ISL43240 (SSOP) TOP VIEW
N.C.
ISL43240 (QFN) TOP VIEW
NO1 NO4 16 15 COM4 14 NC4 13 V+ 12 NC3 11 COM3 6 COM2 7 NO2 8 IN2 9 IN3 10 NO3 IN1 18 IN4 17
IN1 1 NO1 2 COM1 3 NC1 4 V- 5 GND 6 NC2 7 COM2 8 NO2 9 IN2 10
20 IN4 19 NO4 18 COM4 17 NC4 16 V+ 15 N.C. 14 NC3 13 COM3 12 NO3 11 IN3 GND NC2 4 5 COM1 NC1 V1 2 3
20
19
NOTE: 1. Switches Shown for Logic "0" Input.
Truth Table
ISL43240 LOGIC 0 1 NOTE: NO SW OFF ON ISL43240 NC SW
Ordering Information
PART NO. (BRAND) ISL43240IA ON ISL43240IA-T OFF ISL43240IR ISL43240IR-T FUNCTION Positive Power Supply Input Negative Power Supply Input. Connect to GND for Single Supply Configurations. Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin No Internal Connection -40 to 85 -40 to 85 -40 to 85 20 Ld SSOP Tape and Reel 20 Ld QFN 20 Ld QFN Tape and Reel M20.209 TEMP. RANGE (oC) -40 to 85 PACKAGE 20 Ld SSOP PKG. NO. M20.209
Logic "0" 0.8V. Logic "1" 2.4V.
L20.4x4 L20.4x4
Pin Descriptions
PIN V+ V-
GND IN COM NO NC N.C.
2
ISL43240
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V All Other Pins (Note 2) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, IN, NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . 100mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Information
Thermal Resistance (Typical) JA (oC/W) 20 Ld SSOP Package (Note 3) . . . . . . . . . . . . . . . . 150 20 Ld QFN Package (Note 4). . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Moisture Sensitivity (See Technical Brief TB363) All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range. . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SSOP - Lead Tips Only)
Operating Conditions
Temperature Range ISL43240IX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 2. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379.
Electrical Specifications: 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full (NOTE 5) MIN V-0.2 -2.5 -0.4 -5 2.4 -1 10 TYP 18 0.5 1.6 1.5 52 40 19 10 10 30 71 -92 59 (NOTE 5) MAX UNITS V+ 25 30 2 4 5 5 0.2 2.5 0.4 5 0.8 1 65 75 50 55 5 V nA nA nA nA V V A ns ns ns ns ns pC pF pF pF dB dB dB
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON) Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q NO OFF Capacitance, COFF NC OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, Note 8 Power Supply Rejection Ratio
VS = 4.5V, ICOM = 10mA, VNO or VNC = 3.5V, See Figure 5 VS = 4.5V, ICOM = 10mA, VNO or VNC = 3V VS = 4.5V, ICOM = 10mA, VNO or VNC = 0V, 3V, Note 7 VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, Note 6 VS = 5.5V, VCOM = VNO or VNC = 4.5V, Note 6
25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS
VS = 5.5V, VIN = 0V or V+ VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 RL = 50, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 RL = 50, CL = 5pF, f = 1MHz
Full 25 Full 25 Full Full 25 25 25 25 25 25 25
3
ISL43240
Electrical Specifications: 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (oC) Full VS = 5.5V, VIN = 0V or V+, Switch On or Off 25 Full Negative Supply Current, INOTES: 5. VIN = Input voltage to perform proper function. 6. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC. 8. Flatness is defined as the delta between the maximum and minimum RON values over the specified voltage range. 9. Between any two switches. 25 Full (NOTE 5) MIN 2 -1 -1 -1 -1 TYP 0.01 0.01 (NOTE 5) MAX UNITS 6 1 1 1 1 V A A A A
PARAMETER POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full MIN (NOTE 5) 0 -0.2 -2.5 -0.4 -5 2.4 -1 15 TYP 30 0.5 4.4 1.5 1.4 64 29 39 1.2 10 10 30 71 -92 59 MAX (NOTE 5) UNITS V+ 40 50 3 4 6 8 0.2 2.5 0.4 5 0.8 1 80 90 40 45 2 V nA nA nA nA V V A ns ns ns ns ns pC pF pF pF dB dB dB
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON)
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V, See Figure 5 V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V V+ = 5.5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V, Note 7 V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, Note 6 V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 1V, 4.5V Note 6
25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q NO OFF Capacitance, COFF NC OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, Note 8 Power Supply Rejection Ratio V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 RL = 50, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 RL = 50, CL = 5pF, f = 1MHz 25 Full 25 Full Full 25 25 25 25 25 25 25 V+ = 5.5V, VIN = 0V or V+
Full
4
ISL43240
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS V+ = 5.5V, V- = 0V, VIN = 0V or V+, Switch On or Off TEMP (oC) 25 Full Negative Supply Current, I25 Full MIN (NOTE 5) -1 -1 -1 -1 TYP 0.01 0.01 MAX (NOTE 5) UNITS 1 1 1 1 A A A A
PARAMETER POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+
Electrical Specifications: 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full MIN (NOTE 5) 0 -0.2 -2.5 -0.4 -5 2.4 -1 30 -1 -1 -1 -1 TYP 51 0.5 12 1.0 0.9 120 50 60 1 10 10 30 71 -92 59 0.01 0.01 MAX (NOTE 5) UNITS V+ 60 70 3 4 17 17 0.2 2.5 0.4 5 0.8 1 138 160 60 65 2 1 1 1 1 V nA nA nA nA V V A ns ns ns ns ns pC pF pF pF dB dB dB A A A A
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON)
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V, See Figure 5 V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V V+ = 3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1.5V, Note 7 V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V, Note 6 V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 1V, 3V, Note 6
25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q NO OFF Capacitance, COFF NC OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, Note 8 Power Supply Rejection Ratio Positive Supply Current, I+ Negative Supply Current, IV+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 RL = 50, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 RL = 50, CL = 5pF, f = 1MHz V+ = 3.6V, V- = 0V, VIN = 0V or V+, Switch On or Off 25 Full 25 Full Full 25 25 25 25 25 25 25 25 Full 25 Full V+ = 3.6V, VIN = 0V or V+
Full
POWER SUPPLY CHARACTERISTICS
5
ISL43240
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 3.0V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V, See Figure 5 V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V V+ = 13.2V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V, Note 7 V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V, Note 6 V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 1V, 12V Note 6 25 Full 25 Full 25 Full 25 Full 25 Full Full Full V+ = 13.2V, VIN = 0V or V+ V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 13.2V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 RL = 50, CL = 15pF, f = 1MHz, VNO or VNC = 1VRMS, See Figures 4 and 6 RL = 50, CL = 5pF, f = 1MHz V+ = 13V, VIN = 0V or V+, Switch On or Off Full 25 Full 25 Full Full 25 25 25 25 25 25 25 25 Full Negative Supply Current, I25 Full MIN (NOTE 6) 0 -0.2 -2.5 -0.4 -5 3.0 -1 5 -1 -1 -1 -1 TYP 14 0.3 1.7 2.8 2.2 40 27 20 12 10 10 30 71 -92 59 0.01 0.01 MAX (NOTE 6) UNITS V+ 20 30 2 4 2 3 0.2 2.5 0.4 5 0.8 1 50 83 35 40 14 1 1 1 1 V nA nA nA nA V V A ns ns ns ns ns pC pF pF pF dB dB dB A A A A
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON)
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q NO OFF Capacitance, COFF NC OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, Note 8 Power Supply Rejection Ratio Positive Supply Current, I+
POWER SUPPLY CHARACTERISTICS
6
ISL43240 Test Circuits and Waveforms
3V LOGIC INPUT 50% 0V tON tON VNO SWITCH OUTPUT VNO VNC tOFF VOUT 75% 25% tOFF 75% 25% LOGIC INPUT VC GND SWITCH INPUTS tr < 20ns tf < 20ns V+ C VNC C NC NO IN RL 300 CL 35pF VOUT C
COM
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) -----------------------------R L + R ( ON ) FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
V+
C
SWITCH OUTPUT VOUT
VOUT
RG
COM
NO or NC
VOUT
3V LOGIC INPUT ON OFF 0V Q = VOUT x CL C VLOGIC INPUT ON VG IN GND CL
Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
C
3V LOGIC INPUT 0V VNX
C
NO
COM
NC
VOUT RL 300 CL 35pF
SWITCH OUTPUT VOUT
80% 0V tD LOGIC INPUT
IN GND
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME FIGURE 3B. TEST CIRCUIT
7
ISL43240 Test Circuits and Waveforms (Continued)
V+ C SIGNAL GENERATOR RON = V1/1mA
NO or NC NO or NC
V+ C
VNX IN 0V or 2.4V 1mA V1 IN 0.8V or 2.4V
ANALYZER RL
COM
GND
COM
GND C VV-
C
Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+ C
Repeat test for all switches. FIGURE 5. RON TEST CIRCUIT
V+
SIGNAL GENERATOR
NO1 or NC1
COM1
50
NO or NC
IN1 0V or 2.4V IN2 0V or 2.4V NO CONNECTION IMPEDANCE ANALYZER
COM
IN
0V or 2.4V
ANALYZER RL
COM2
NO2 or NC2
GND
GND
C V-
V-
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL43240 quad analog switches offer precise switching capability from a bipolar 2V to 6V or a single 2V to 12V supply with low on-resistance (18) and high speed operation (tON = 52ns, tOFF = 40ns). The devices are especially well suited for portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (5W), low leakage currents (5nA max). High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection.
Figure 8). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above V-.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see
8
ISL43240
The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. ISL43240 has been designed to minimize the supply current whenever the digital input voltage is not driven to the supply rails (0V to V+). For example driving the device with 3V logic (0V to 3V) while operating with dual or single 5V supplies the device draws only 10A of current (see Figure 18 for VIN = 3V). Similiar devices of competitors can draw 8 times this amount of current.
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO or NC VCOM
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 200MHz (see Figure 19). Figure 19 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch's input to its output. Off Isolation is the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to another. Figure 20 details the high Off Isolation and Crosstalk rejection provided by this switch. At 10MHz, off isolation is about 50dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
VOPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL43240 construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL43240 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (6V or 12V single supply), as well as room for overshoot and noise spikes. This family of switches performs equally well when operated with bipolar or single voltage supplies. The minimum recommended supply voltage is 2V or 2V. It is important to note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance curves for details. V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals.
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This switch family is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.5V to 10V (see Figure 17). At 12V the VIH level is about 2.8V. For best results with a 12V supply, use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails (see Figure 18). Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation. The 9
ISL43240 Typical Performance Curves TA = 25oC, Unless Otherwise Specified
25 20 15 10 35 30 25 20 15 10 200 150 125 100 75 50 25 0 -40oC 85oC V- = -5V 25oC VCOM = (V+) - 1V ICOM = 1mA 70 60 50 40 30 V- = -3V 85oC RON () -40oC V- = 0V 85oC 25oC 25oC 20 35 30 25 20 15 20 18 16 14 12 10 8 85oC 25oC -40oC 85oC 25oC -40oC 85oC V+ = 5V V- = 0V V+ = 3V V- = 0V ICOM = 1mA
RON ()
25oC
V+ = 12V V- = 0V
-40oC 2 3 4 5 6 7 8 V+ (V) 9 10 11 12 13
-40oC 0 1 2 3 4 5 6 7 VCOM (V) 8 9 10 11 12
FIGURE 9. ON RESISTANCE vs POSITIVE SUPPLY VOLTAGE
45 40 35 30 25 20 35 30 RON () 25 20 15 10 25 20 15 10 5 -5 -4 -3 -2 -1 0 VCOM (V) 1 2 3 4 5 -40oC 25oC 85oC 85oC ICOM = 1mA 85oC 25oC VS = 2V
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
15
10 -40oC VS = 3V 25oC -40oC Q (pC) 5 VS = 5V 0 V+ = 3V V+ = 5V V+ = 12V
VS = 5V
-5
-10 -5 -2.5 0 2.5 5 VCOM (V) 7.5 10 12.5
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
300 VCOM = (V+) - 1V V- = 0V 250
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
50 VCOM = (V+) - 1V V- = 0V 40
200 tOFF (ns) tON (ns) 85oC 25oC 100 -40oC 50 20 -40oC 85oC 25oC
150
30
0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12
10 2 3 4 5 6 7 V+ (V) 8 9 10 11 12
FIGURE 13. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
FIGURE 14. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
10
ISL43240 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
300 250 200 150 100 50 tON (ns) 0
250 200 150 100 50 0
150 -40oC 25oC 25oC 85oC tOFF (ns) -40oC 0 300 250 200 25oC -40oC 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 150 85oC 100 50 0 2 V- = -5V VCOM = (V+) - 1V 100
-40oC 25oC
V- = -5V
VCOM = (V+) - 1V
50 -40oC
25oC 85oC
V- = -3V -40oC
V- = -3V -40oC 25oC 85oC 3 4 5 6 7 V+ (V) 8 9 10 11 12
FIGURE 15. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
3.0 VINH 2.5 2.0 1.5 VINH AND VINL (V) 1.0 0.5 3.0 VINL 2.5 2.0 1.5 1.0 0.5 2 3 4 5 6 7 8 V+ (V) 9 10 85oC 25oC -40oC 25oC -40oC 85oC
FIGURE 16. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
70 V- = -5V to 0V V+ = +5V
60
50 V- = 0V to -5V
I+CC (A)
40
30
20
10 V- = 0V to -5V 11 12 13
0 0 0.5 1 1.5 2 2.5 VIN (V) 3 3.5 4 4.5 5
FIGURE 17. DIGITAL SWITCHING POINT vs POSITIVE SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
FIGURE 18. POSITIVE SUPPLY CURRENT vs DIGITAL INPUT VOLTAGE
-10 10 20 30 OFF ISOLATION (dB) 40 50 ISOLATION 60 70 80 CROSSTALK -90 ALL HOSTILE CROSSTALK -100 -110 1k 100 110 100M 500M 90 V+ = 3V to 12V or -20 VS = 2V to 5V RL = 50 -30 -40 CROSSTALK (dB) -50 -60 -70 -80
3 0 GAIN -3
V+ = 2.7V (VIN = 2VP-P) VS = 2V or V+ = 5V (VIN = 4VP-P) VS = 5V (VIN = 5VP-P)
0 PHASE VS = 2V (VIN = 4VP-P) V+ = 5V (VIN = 4VP-P) VS = 5V (VIN = 5VP-P) V+ = 2.7V (VIN = 2VP-P) RL = 50 1 10 100 FREQUENCY (MHz) 600 45 90 135 180 PHASE (DEGREES)
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 19. FREQUENCY RESPONSE
FIGURE 20. CROSSTALK AND OFF ISOLATION
11
ISL43240 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued) Die Characteristics
V+ = 3V to 12V or VS = 2V to 5V RL = 50
SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: ISL43240: 418 PROCESS:
0 10 PSRR (dB) 20 30
VIN = 1VP-P
-PSRR, SWITCH ON 40 50 60 +PSRR, SWITCH ON 70
Si Gate CMOS
0.3
1
10 100 FREQUENCY (MHz)
1000
FIGURE 21. PSRR vs FREQUENCY
12
ISL43240 Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 0.25 0.010 L GAUGE PLANE H 0.25(0.010) M BM
M20.209 (JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D
-C-
MILLIMETERS MIN 1.73 0.05 1.68 0.25 0.09 7.07 5.20' MAX 1.99 0.21 1.78 0.38 0.20' 7.33 5.38 3 4 9 NOTES
MIN 0.068 0.002 0.066 0.010' 0.004 0.278 0.205
MAX 0.078 0.008' 0.070' 0.015 0.008 0.289 0.212
SEATING PLANE -AD A
A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.301 0.025 20 0 deg. 8 deg. 0.311 0.037
0.65 BSC 7.65 0.63 20 0 deg. 8 deg. Rev. 3 11/02 7.90' 0.95 6 7
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
13
ISL43240 Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP)
L20.4x4
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VGGD-1 ISSUE C) MILLIMETERS SYMBOL A A1 A2 A3 b D D1 D2 E E1 E2 e k L L1 N Nd Ne P 5 0.25 0.35 1.95 1.95 0.18 MIN 0.80 NOMINAL 0.90 0.20 REF 0.23 4.00 BSC 3.75 BSC 2.10 4.00 BSC 3.75 BSC 2.10 0.50 BSC 0.60 20 5 5 0.60 12 0.75 0.15 2.25 2.25 0.30 MAX 1.00 0.05 1.00 NOTES 9 9 5, 8 9 7, 8 9 7, 8 8 10 2 3 3 9 9 Rev. 1 10/02 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & are present when Anvil singulation method is used and not present for saw singulation. 10. Depending on the method of lead termination at the edge of the package, a maximum 0.15mm pull back (L1) maybe present. L minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 14

▲Up To Search▲

Price & Availability of ISL43240

	To Download ISL43240 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .